1. Field of the Invention
The invention relates in general to a non-volatile memory, and more particularly, to a multi-bit flash memory and method of fabricating the same.
2. Related Art of the Invention
Among various non-volatile memories, the flash memory has become a memory device broadly applied in personal computer and electronic equipment due to the advantages of multiple data accesses and data retention after power interrupt.
The typical flash memory includes floating gate and control gate made of doped polysilicon. The floating gate is formed between the control gate and the substrate and under a floating state without electric connection to any other devices. The control gate is coupled to the word line. The flash memory further includes a tunneling oxide and a dielectric layer located between the substrate and the floating gate, and between the floating gate and the control gate, respectively. While programming the flash memory, a positive voltage is applied to the control gate, and a relatively small voltage is applied to the drain region (or source region). Thereby, hot electrons generated between the substrate and the drain region (or source region) are injected through the tunneling oxide and trapped in the floating gate. The hot electrons are uniformly distributed all over the polysilicon floating gate. Therefore, one flash memory cell can store either xe2x80x9c1xe2x80x9d or xe2x80x9c0xe2x80x9d and is a single-bit memory cell.
The increase of semiconductor integration has driven the demand for developing multi-bit memory cells. For example, in the U.S. Pat. No. 6,420,237, a method of fabricating a flash memory with multi-bit memory cells is disclosed. In this disclosure, a floating gate is partitioned into two independent blocks to form the two-bit structure. Again, the multi-bit memory cell cannot meet the high-density data storage requirement, and the memory cell able to store multiple bits is required.
The present invention provides a multi-bit flash memory and a method of fabricating the same. Multiple bits of data can be stored in a single memory cell of the flash memory, such that the device integration is increased.
The present invention further provides a multi-bit flash memory and a method of fabricating the same to avoid over-erase and enhance reliability of the flash memory.
The flash memory provided by the present invention comprises a control gate on a substrate, a floating gate between the control gate and the substrate, a source region and a drain region in the substrate at two sides of the floating gate, a channel region in the substrate under the floating gate, and an isolation region in the floating gate. The isolation region partitions the floating gate into a plurality of conductive blocks arranged as an array. The rows of the array extend from the source region to the drain region. Each row of the array comprises two conductive blocks, and each column of the array comprises n (n is a positive integer) conductive blocks. Before data is written into the multi-bit flash memory, the channel regions under the conductive blocks of the same row have the same threshold voltage, while the channel regions under the conductive blocks of different rows have different threshold voltages.
The above multi-bit flash memory further comprises a gate dielectric layer formed between the control gate and the floating gate, and a tunneling oxide layer formed between the floating gate and the substrate.
In the above structure, the isolation region partitions the floating gate into a plurality of conductive blocks to form the multi-bit structure, and the channel regions under the conductive blocks of different rows have different threshold voltages. Therefore, multiple bits of data can be saved in a single memory cell to increase the device data storage quantity and integration. Further, as the floating gates are partitioned into individual and independent conductive blocks (that is, the bits are separated from each other), the problem of secondary electron injection is resolved, and the device reliability is enhanced.
The method of fabricating a multi-bit flash memory provided by the present invention comprises the following steps. A silicon oxide layer and a conductive layer are sequentially formed on a substrate. An isolation layer is formed in the conductive layer to partition the conductive layer into a plurality of conductive blocks. An array formed of the conductive blocks includes rows extending from one bit line to another bit line, and columns each having n (n is a positive integer) conductive blocks. A gate dielectric layer is formed on the conductive layer. The gate dielectric layer and the conductive layer are patterned to form a floating gate. Bit lines are formed in the substrate at two sides of the floating gate. A control gate is then formed on the gate dielectric layer. A threshold voltage adjustment step is then performed to result in different threshold voltages for the channel regions under the conductive blocks of different rows.
In the above method, the conductive layer includes germanium polycide. The method of forming the isolation region includes forming a patterned photoresist layer exposing the region predetermined for forming the conductive blocks on the conductive layer, following by an ion implantation step for implanting oxygen ions (or nitrogen ion) into the exposed region. An annealing step is then performed, such that the oxygen ions (or nitrogen ion) are reacted with the silicon of the conductive layer.
The above method further comprises a step of forming a field oxide layer on the bit lines and a spacer on a sidewall of the floating gate.
Further, in the above method, the isolation region partitions the conductive layer into a plurality of conductive blocks. The channel regions under the conductive blocks of different rows have different threshold voltages, such that a single memory cell has the multi-bit structure. Therefore, without increasing the volume of the memory cell, the stored bits of data and device integration are increased. Further, as the conductive blocks are separate from each other (that is, each bit of the memory cell are independent from each other), the problem of generating secondary electron injection is resolved.